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EC3352 Digital Systems Design Syllabus - Anna University

Access the updated Anna University EC3352 syllabus for Digital Systems Design on LearnSkart. This Anna University subject syllabus PDF presents the updated semester 3 syllabus aligned with Regulation 2021 for Electronics and Communication Engineering students and related branches. It covers unit-wise subject unit topics and supports exam preparation syllabus planning for internal assessments and semester examinations under Anna University engineering syllabus standards.

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EC3352 DIGITAL SYSTEMS DESIGN

L T P C

3 0 2 4

COURSE OBJECTIVES:

UNIT I BASIC CONCEPTS

Review of number systems-representation-conversions, Review of Boolean algebra- theorems, sum of product and product of sum simplification, canonical forms min term and max term, Simplification of Boolean expressions-Karnaugh map, completely and incompletely specified functions, Implementation of Boolean expressions using universal gates ,Tabulation methods.

UNIT II COMBINATIONAL LOGIC CIRCUITS

Problem formulation and design of combinational circuits - Code-Converters, Half and Full Adders, Binary Parallel Adder – Carry look ahead Adder, BCD Adder, Magnitude Comparator, Decoder, Encoder, Priority Encoder, Mux/Demux, Case study: Digital trans-receiver / 8 bit Arithmetic and logic unit, Parity Generator/Checker, Seven Segment display decoder

UNIT III SYNCHRONOUS SEQUENTIAL CIRCUITS

Latches, Flip flops – SR, JK, T, D, Master/Slave FF, Triggering of FF, Analysis and design of clocked sequential circuits – Design - Moore/Mealy models, state minimization, state assignment,lock - out condition circuit implementation - Counters, Ripple Counters, Ring Counters, Shift registers, Universal Shift Register. Model Development: Designing of rolling display/real time clock

UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUITS

Stable and Unstable states, output specifications, cycles and races, state reduction, race free assignments, Hazards, Essential Hazards, Fundamental and Pulse mode sequential circuits, Design of Hazard free circuits.

UNIT V LOGIC FAMILIES AND PROGRAMMABLE LOGIC DEVICES

Logic families- Propagation Delay, Fan - In and Fan - Out - Noise Margin - RTL ,TTL,ECL, CMOS - Comparison of Logic families - Implementation of combinational logic/sequential logic design using standard ICs, PROM, PLA and PAL, basic memory, static ROM,PROM,EPROM,EEPROM EAPROM.

THEORY: 45 PERIODS

PRACTICAL EXERCISES: 30 PERIODS

TOTAL: 75 PERIODS

COURSE OUTCOMES:

At the end of the course the students will be able to

  1. CO1: Use Boolean algebra and simplification procedures relevant to digital logic.
  2. CO2: Design various combinational digital circuits using logic gates.
  3. CO3: Analyse and design synchronous sequential circuits.
  4. CO4: Analyse and design asynchronous sequential circuits.
  5. CO5: Build logic gates and use programmable devices

TEXTBOOKS:

  1. M. Morris Mano and Michael D. Ciletti, 'Digital Design', Pearson, 5th Edition, 2013.(Unit - I - V)

REFERENCES:

  1. Charles H. Roth, Jr, 'Fundamentals of Logic Design', Jaico Books, 4th Edition, 2002.
  2. William I. Fletcher, "An Engineering Approach to Digital Design", Prentice- Hall of India, 1980.
  3. Floyd T.L., "Digital Fundamentals", Charles E. Merril publishing company,1982.
  4. John. F. Wakerly, "Digital Design Principles and Practices", Pearson Education, 4th Edition,2007.

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